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The secret is that there really aren't many. If anything their hardware is far more accessible than the Broadcom chipsets which have become quite popular. The Allwinner chipsets are based heavily on reference designs joined together into a SoC.
The main reason for this post is to share collected documents
Docs pertaining to Allwinner SoCs
Please feel free to add to it. It's mostly focused around the H3. I also didn't collect anything to do with the partially implemented OpenRisc core for power control.
For quite some time I have been working on understanding the H3 so I could port RISC OS to the Orange Pi PC. Why that? Because I have one.
The link below is to the HAL, which mostly contains code I've written or modified. Anywhere that a Castle license appears, it is now Apache2.0 as major things happened in RISC OS Open recently including but certainly not limited to the changing of license type
RISC OS H3 HAL
The thing about this is I changed some of my code to a BSD license literally the day before their big changes happened. I mostly changed it because having it under the Castle license bothered me because I felt others could benefit from looking at, and using parts of the code.
I think I have an older "working" legacy U-Boot image of RISC OS for the Orange Pi PC in the repository. It lacks many important features, but it does boot and has functionality through a serial terminal. I think USB2.0 also works in that build. I was using it with a USB drive formatted to FileCore with a RISC OS HardDisk4 extracted to it. I know it could also detect mice and keyboards, and suspect that the desktop may have been actually running with a framebuffer, but with no hardware set up to display it.
It is not buildable in it's current form on GitHub, but it may serve as reference.
RISC OS could always use more users and developers. It's a great OS for people who like to play with hardware and software.
RISC OS Open
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