Orange Pi 5 SPI (spidev) connection problem.

gLush

Have anyone experience with 3rd party module connection with SPI to Opi5?
I'm running Linux orangepi5 5.10.110-rockchip-rk3588 #23.02.2 SMP.

I add spidev device using armbian-config (opi-spi4-m0-cs1-spidev)

verbosity=1
bootlogo=false
overlay_prefix=rockchip-rk3588
fdtfile=rockchip/rk3588s-orangepi-5.dtb
rootdev=UUID=6fc3824e-c6c2-4781-8807-20e5a4bfc432
rootfstype=ext4
overlays=opi5-spi4-m0-cs1-spidev

Two devices appears -

crwxrw-rw- 1 root root 153, 0 Apr 17 10:55 /dev/spidev4.0
crwxrw-rw- 1 root root 153, 1 Apr 17 10:55 /dev/spidev4.1

SPI4 pins are at ALT8 mode.

|   49 |  11 | SPI4_TXD |   ALT8 | 1 | 19 || 20 |   |        | GND      |     |      |

|   48 |  12 | SPI4_RXD |   ALT8 | 1 | 21 || 22 | 1 | IN     | GPIO2_D4 | 13  | 92   |

|   50 |  14 | SPI4_CLK |   ALT8 | 0 | 23 || 24 | 1 | ALT8   | SPI4_CS1 | 15  | 52   |
| GPIO | wPi |   Name   |  Mode  | V | Physical | V |  Mode  | Name     | wPi | GPIO |
+------+-----+----------+--------+---+   OPI5   +---+--------+----------+-----+------+

Internal loopback test with spidev_test works w/o problem if I put wire MOSI <-> MISO.

But when I plug 3rd party module (Qorvo DWM1000) there and run test program I see something strange at CLOCK. And CS and MISO always high. Seems CS problem. Any ideas?

gLush

Seems to me something wrong with device tree overlay. Here is part of UART boot log:

reading /dtb/rockchip/rk3588s-orangepi-5.dtb
234767 bytes read in 2 ms (111.9 MiB/s)
reading /dtb/rockchip/overlay/rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dtbo
598 bytes read in 2 ms (292 KiB/s)
Applying kernel provided DT overlay rockchip-rk3588-opi5-spi4-m0-cs1-spidev.dtbo
** Unable to read file /dtb/rockchip/overlay/rockchip-rk3588-fixup.scr **