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I am designing my base board with specific peripherals. Right now there is no booting from the EMMC. 
DDR Version V1.10 20210810 
ln 
ddrconfig:0 
LP4 MR14:0x4d 
LPDDR4, 324MHz 
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB 
tdqss: cs0 dqs0: 337ps, dqs1: 241ps, dqs2: 337ps, dqs3: 265ps, 
 
change to: 324MHz 
PHY drv:clk:38,ca:38,DQ:30,odt:0 
vrefinner:41%, vrefout:41% 
dram drv:40,odt:0 
clk skew:0x58 
 
change to: 528MHz 
PHY drv:clk:38,ca:38,DQ:30,odt:60 
vrefinner:16%, vrefout:41% 
dram drv:40,odt:0 
clk skew:0x80 
 
change to: 780MHz 
PHY drv:clk:38,ca:38,DQ:30,odt:60 
vrefinner:16%, vrefout:41% 
dram drv:40,odt:0 
clk skew:0x69 
 
change to: 1056MHz(final freq) 
PHY drv:clk:38,ca:38,DQ:30,odt:60 
vrefinner:16%, vrefout:29% 
dram drv:40,odt:80 
vref_ca:00000068 
clk skew:0x4f 
cs 0: 
the read training result: 
DQS0:0x3c, DQS1:0x36, DQS2:0x3b, DQS3:0x3c, 
min  : 0xb  0xe 0x10  0xd  0x1  0x4  0x8  0x8 , 0x5  0x8  0x3  0x1  0x9  0xd  0xc  0x9 , 
       0x8  0x1  0x5  0x7  0x4  0x3  0x5  0x3 , 0x7  0x4  0x2  0x0  0x8  0xb  0x9  0x8 , 
mid  :0x29 0x2b 0x2c 0x2a 0x1d 0x21 0x25 0x25 ,0x23 0x26 0x20 0x1e 0x27 0x2a 0x29 0x26 , 
      0x25 0x1e 0x23 0x25 0x22 0x20 0x22 0x21 ,0x24 0x22 0x21 0x1d 0x26 0x29 0x27 0x25 , 
max  :0x47 0x49 0x49 0x47 0x39 0x3e 0x42 0x42 ,0x41 0x44 0x3e 0x3b 0x46 0x47 0x47 0x44 , 
      0x43 0x3c 0x41 0x43 0x40 0x3e 0x40 0x40 ,0x41 0x41 0x40 0x3a 0x44 0x47 0x46 0x42 , 
range:0x3c 0x3b 0x39 0x3a 0x38 0x3a 0x3a 0x3a ,0x3c 0x3c 0x3b 0x3a 0x3d 0x3a 0x3b 0x3b , 
      0x3b 0x3b 0x3c 0x3c 0x3c 0x3b 0x3b 0x3d ,0x3a 0x3d 0x3e 0x3a 0x3c 0x3c 0x3d 0x3a , 
the write training result: 
DQS0:0x7c, DQS1:0x6f, DQS2:0x7c, DQS3:0x72, 
min  :0x8f 0x90 0x92 0x8f 0x86 0x88 0x8d 0x8f 0x8f ,0x81 0x86 0x7d 0x7b 0x87 0x8a 0x89 0x88 0x87 , 
      0x8e 0x89 0x8c 0x8c 0x8b 0x8a 0x8e 0x8d 0x8c ,0x7f 0x7d 0x7d 0x79 0x84 0x87 0x85 0x85 0x7e , 
mid  :0xac 0xae 0xaf 0xac 0xa3 0xa4 0xaa 0xab 0xab ,0x9d 0xa2 0x99 0x98 0xa2 0xa7 0xa5 0xa4 0xa2 , 
      0xab 0xa7 0xa9 0xaa 0xa8 0xa7 0xaa 0xa9 0xa9 ,0x9b 0x9a 0x99 0x96 0x9f 0xa4 0xa0 0xa0 0x9a , 
max  :0xc9 0xcc 0xcc 0xca 0xc0 0xc1 0xc7 0xc7 0xc8 ,0xba 0xbf 0xb6 0xb5 0xbe 0xc4 0xc1 0xc1 0xbd , 
      0xc9 0xc5 0xc7 0xc8 0xc5 0xc4 0xc6 0xc6 0xc7 ,0xb7 0xb7 0xb6 0xb3 0xba 0xc1 0xbb 0xbb 0xb7 , 
range:0x3a 0x3c 0x3a 0x3b 0x3a 0x39 0x3a 0x38 0x39 ,0x39 0x39 0x39 0x3a 0x37 0x3a 0x38 0x39 0x36 , 
      0x3b 0x3c 0x3b 0x3c 0x3a 0x3a 0x38 0x39 0x3b ,0x38 0x3a 0x39 0x3a 0x36 0x3a 0x36 0x36 0x39 , 
CA Training result: 
cs:0 min  :0x42 0x38 0x3c 0x30 0x3e 0x30 0x3f ,0x47 0x37 0x3e 0x34 0x3e 0x2d 0x40 , 
cs:0 mid  :0x7d 0x7b 0x76 0x75 0x75 0x75 0x68 ,0x7f 0x7b 0x76 0x77 0x76 0x73 0x68 , 
cs:0 max  :0xb8 0xbf 0xb1 0xbb 0xad 0xbb 0x92 ,0xb8 0xbf 0xae 0xbb 0xaf 0xba 0x91 , 
cs:0 range:0x76 0x87 0x75 0x8b 0x6f 0x8b 0x53 ,0x71 0x88 0x70 0x87 0x71 0x8d 0x51 , 
out 
U-Boot SPL board init 
U-Boot SPL 2017.09-orangepi (Sep 21 2023 - 19:23:06) 
unrecognized JEDEC id bytes: ff, ff, ff 
Trying to boot from MMC1 
Card did not respond to voltage select! 
spl: mmc init failed with error: -95 
Trying to boot from MMC2 
No misc partition 
Trying fit image at 0x4000 sector 
## Verified-boot: 0 
## Checking atf-1 0x00040000 ... sha256(2f01bd8955...) + OK 
## Checking uboot 0x00a00000 ... sha256(4748c9335a...) + OK 
## Checking fdt 0x00b44da8 ... sha256(ec3d1eb071...) + OK 
## Checking atf-2 0xfdcc9000 ... sha256(f1fecab971...) + OK 
## Checking atf-3 0xfdcd0000 ... sha256(d7aa45eb18...) + OK 
Jumping to U-Boot(0x00a00000) via ARM Trusted Firmware(0x00040000) 
Total: 569.694 ms 
 
INFO:    Preloader serial: 2 
NOTICE:  BL31: v2.3():v2.3-152-g4e725b15f:cl 
NOTICE:  BL31: Built : 10:51:13, Jul 15 2021 
INFO:    GICv3 without legacy support detected. 
INFO:    ARM GICv3 driver initialized in EL3 
INFO:    pmu v1 is valid 
INFO:    dfs DDR fsp_param[0].freq_mhz= 1056MHz 
INFO:    dfs DDR fsp_param[1].freq_mhz= 324MHz 
INFO:    dfs DDR fsp_param[2].freq_mhz= 528MHz 
INFO:    dfs DDR fsp_param[3].freq_mhz= 780MHz 
INFO:    Using opteed sec cpu_context! 
INFO:    boot cpu mask: 0 
INFO:    BL31: Initializing runtime services 
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK 
ERROR:   Error initializing runtime service opteed_fast 
INFO:    BL31: Preparing for EL3 exit to normal world 
INFO:    Entry point address = 0xa00000 
INFO:    SPSR = 0x3c9 
 
 
U-Boot 2017.09-orangepi (Sep 21 2023 - 19:23:06 +0800) 
 
Model: Orange Pi CM4 
PreSerial: 2, raw, 0xfe660000 
DRAM:  1022 MiB 
Sysmem: init 
Relocation Offset: 3d234000 
Relocation fdt: 3b9f6a70 - 3b9fecc8 
CR: M/C/I 
Using default environment 
 
no mmc device at slot 1 
dwmmc@fe2b0000: 0, dwmmc@fe2c0000: 2, sdhci@fe310000: 1 (eMMC) 
Bootdev(atags): mmc 1 
MMC1: HS200, 200Mhz 
PartType: EFI 
DM: v1 
boot mode: None 
I2c0 speed: 100000Hz 
vsel-gpios- not found! Error: -2 
vdd_cpu 643750 uV 
PMIC:  RK8090 (on=0x40, off=0x00) 
vdd_logic init 900000 uV 
vdd_gpu init 900000 uV 
vdd_npu init 900000 uV 
of_get_regulator: Get (vccio3-supply) regulator: 0 failed, ret=-19 
of_get_regulator: Get (vccio5-supply) regulator: 0 failed, ret=-19 
of_get_regulator: Get (vccio6-supply) regulator: 0 failed, ret=-19 
of_get_regulator: Get (vccio7-supply) regulator: 0 failed, ret=-19 
io-domain: OK 
Failed to get scmi clk dev 
dmc_fsp failed, ret=-19 
Model: Orange Pi CM4 
CLK: (sync kernel. arm: enter 816000 KHz, init 816000 KHz, kernel 0N/A) 
  apll 816000 KHz 
  dpll 528000 KHz 
  gpll 1188000 KHz 
  cpll 1000000 KHz 
  npll 24000 KHz 
  vpll 24000 KHz 
  hpll 24000 KHz 
  ppll 200000 KHz 
  armclk 816000 KHz 
  aclk_bus 150000 KHz 
  pclk_bus 50000 KHz 
  aclk_top_high 300000 KHz 
  aclk_top_low 200000 KHz 
  hclk_top 150000 KHz 
  pclk_top 50000 KHz 
  aclk_perimid 300000 KHz 
  hclk_perimid 150000 KHz 
  pclk_pmu 100000 KHz 
Net:   No ethernet found. 
Hit key to stop autoboot('CTRL+C'):  0 
Card did not respond to voltage select! 
dwmmc@fe2b0000: 0 
dwmmc@fe2c0000: 2 
sdhci@fe310000: 1 (eMMC) 
switch to partitions #0, OK 
mmc1(part 0) is current device 
Scanning mmc 1:1... 
Found U-Boot script /boot.scr 
reading /boot.scr 
3411 bytes read in 1 ms (3.3 MiB/s) 
## Executing script at 00c00000 
Boot script loaded from mmc 1 
reading /orangepiEnv.txt 
285 bytes read in 1 ms (278.3 KiB/s) 
reading /uInitrd 
14355838 bytes read in 81 ms (169 MiB/s) 
reading /Image 
34933248 bytes read in 196 ms (170 MiB/s) 
reading /dtb/rockchip/rk3566-orangepi-cm4.dtb 
165956 bytes read in 3 ms (52.8 MiB/s) 
reading /dtb/rockchip/overlay/rk356x-spi3-m0-cs0-spidev.dtbo 
356 bytes read in 2 ms (173.8 KiB/s) 
Applying kernel provided DT overlay rk356x-spi3-m0-cs0-spidev.dtbo 
reading /dtb/rockchip/overlay/rk356x-uart3-m0.dtbo 
311 bytes read in 2 ms (151.4 KiB/s) 
Applying kernel provided DT overlay rk356x-uart3-m0.dtbo 
reading /dtb/rockchip/overlay/rk356x-uart7-m2.dtbo 
311 bytes read in 1 ms (303.7 KiB/s) 
Applying kernel provided DT overlay rk356x-uart7-m2.dtbo 
reading /dtb/rockchip/overlay/rk356x-fixup.scr 
2756 bytes read in 2 ms (1.3 MiB/s) 
Applying kernel provided DT fixup script (rk356x-fixup.scr) 
## Executing script at 09000000 
Fdt Ramdisk skip relocation 
## Loading init Ramdisk from Legacy Image at 0a200000 ... 
   Image Name:   uInitrd 
   Image Type:   AArch64 Linux RAMDisk Image (gzip compressed) 
   Data Size:    14355774 Bytes = 13.7 MiB 
   Load Address: 00000000 
   Entry Point:  00000000 
   Verifying Checksum ... OK 
## Flattened Device Tree blob at 0x08300000 
   Booting using the fdt blob at 0x08300000 
   reserving fdt memory region: addr=8300000 size=8e000 
  'reserved-memory' ramoops@110000: addr=110000 size=f0000 
   Using Device Tree in place at 0000000008300000, end 0000000008390fff 
Adding bank: 0x00200000 - 0x40000000 (size: 0x3fe00000) 
== DO RELOCATE == Kernel from 0x00280000 to 0x00400000 
Total: 1140.248 ms 
 
Starting kernel ... 
 
Loading, please wait... 
Starting systemd-udevd version 252.19-1~deb12u1  What GPIOs do I need to use to work with the on-board EMMC? 
 
 
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